maxime pelcat
maxime pelcat
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Zitiert von
Zitiert von
Accelerating CNN inference on FPGAs: A survey
K Abdelouahab, M Pelcat, J Serot, F Berry
arXiv preprint arXiv:1806.01683, 2018
Preesm: A dataflow-based rapid prototyping framework for simplifying multicore dsp programming
M Pelcat, K Desnos, J Heulot, C Guy, JF Nezan, S Aridhi
2014 6th european embedded design in education and research conference …, 2014
Pimm: Parameterized and interfaced dataflow meta-model for mpsocs runtime reconfiguration
K Desnos, M Pelcat, JF Nezan, SS Bhattacharyya, S Aridhi
2013 International Conference on Embedded Computer Systems: Architectures …, 2013
Tactics to directly map CNN graphs on embedded FPGAs
K Abdelouahab, M Pelcat, J Serot, C Bourrasset, F Berry
IEEE Embedded Systems Letters 9 (4), 113-116, 2017
An open framework for rapid prototyping of signal processing applications
M Pelcat, J Piat, M Wipliez, S Aridhi, JF Nezan
EURASIP journal on embedded systems 2009, 1-13, 2009
Physical layer multi-core prototyping: A dataflow-based approach for LTE eNodeB
M Pelcat, S Aridhi, J Piat, JF Nezan
Springer, 2013
Porting a PCA-based hyperspectral image dimensionality reduction algorithm for brain cancer detection on a manycore architecture
R Lazcano, D Madroñal, R Salvador, K Desnos, M Pelcat, R Guerra, ...
Journal of Systems Architecture 77, 101-111, 2017
Design productivity of a high level synthesis compiler versus HDL
M Pelcat, C Bourrasset, L Maggiani, F Berry
2016 international conference on embedded computer systems: Architectures …, 2016
Spider: A synchronous parameterized and interfaced dataflow-based rtos for multicore dsps
J Heulot, M Pelcat, K Desnos, JF Nezan, S Aridhi
2014 6th European Embedded Design in Education and Research Conference …, 2014
A system-level architecture model for rapid prototyping of heterogeneous multicore embedded systems
M Pelcat, JF Nezan, J Piat, J Croizer, S Aridhi
Conference on Design and Architectures for Signal and Image Processing …, 2009
Algorithmic-level approximate computing applied to energy efficient hevc decoding
E Nogues, D Menard, M Pelcat
IEEE Transactions on Emerging Topics in Computing 7 (1), 5-17, 2016
Scalable compile-time scheduler for multi-core architectures
M Pelcat, P Menuet, S Aridhi, JF Nezan
2009 Design, Automation & Test in Europe Conference & Exhibition, 1552-1555, 2009
Ntire 2020 challenge on image demoireing: Methods and results
S Yuan, R Timofte, A Leonardis, G Slabaugh
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern …, 2020
Cross-layer design of reconfigurable cyber-physical systems
M Masin, F Palumbo, H Myrhaug, JA de Oliveira Filho, M Pastena, ...
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017
Low power HEVC software decoder for mobile devices
E Raffin, E Nogues, W Hamidouche, S Tomperi, M Pelcat, D Menard
Journal of Real-Time Image Processing 12, 495-507, 2016
A DVFS based HEVC decoder for energy-efficient software implementation on embedded processors
E Nogues, R Berrada, M Pelcat, D Menard, E Raffin
2015 IEEE international conference on multimedia and expo (ICME), 1-6, 2015
Study of the impact of standard image compression techniques on performance of image classification with a convolutional neural network
M Dejean-Servières, K Desnos, K Abdelouahab, W Hamidouche, L Morin, ...
INSA Rennes; Univ Rennes; IETR; Institut Pascal, 2017
Why tanh is a hardware friendly activation function for cnns
K Abdelouahab, M Pelcat, F Berry
Proceedings of the 11th international conference on distributed smart …, 2017
Power-aware HEVC decoding with tunable image quality
E Nogues, S Holmbacka, M Pelcat, D Menard, J Lilius
2014 IEEE workshop on signal processing systems (SiPS), 1-6, 2014
Energy efficiency and performance management of parallel dataflow applications
S Holmbacka, E Nogues, M Pelcat, S Lafond, J Lilius
Proceedings of the 2014 Conference on Design and Architectures for Signal …, 2014
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