Douglas A. Buchanan
Douglas A. Buchanan
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Zitiert von
Zitiert von
CMOS scaling into the nanometer regime
Y Taur, DA Buchanan, W Chen, DJ Frank, KE Ismail, SH Lo, ...
Proceedings of the IEEE 85 (4), 486-504, 1997
Quantum-mechanical modeling of electron tunneling current from the inversion layer of ultra-thin-oxide nMOSFET's
SH Lo, DA Buchanan, Y Taur, W Wang
IEEE electron device letters 18 (5), 209-211, 1997
Precursor source mixtures
DA Buchanan, DA Neumayer
US Patent 6,984,591, 2006
Scaling the gate dielectric: materials, integration, and reliability
DA Buchanan
IBM journal of research and development 43 (3), 245-264, 1999
Ultrathin high-K metal oxides on silicon: processing, characterization and integration issues
EP Gusev, E Cartier, DA Buchanan, M Gribelyuk, M Copel, ...
Microelectronic Engineering 59 (1-4), 341-349, 2001
Passivation and depassivation of silicon dangling bonds at the Si/SiO2 interface by atomic hydrogen
E Cartier, JH Stathis, DA Buchanan
Applied physics letters 63 (11), 1510-1512, 1993
Volatile and non-volatile memories in silicon with nano-crystal storage
S Tiwari, F Rana, K Chan, H Hanafi, W Chan, D Buchanan
Proceedings of International Electron Devices Meeting, 521-524, 1995
Ultrathin high-K gate stacks for advanced CMOS devices
EP Gusev, DA Buchanan, E Cartier, A Kumar, D DiMaria, S Guha, ...
International Electron Devices Meeting. Technical Digest (Cat. No. 01CH37224 …, 2001
Diamond-like carbon films from a hydrocarbon helium plasma
FD Bailey, DA Buchanan, AC Callegari, HM Clearfield, FE Doany, ...
US Patent 5,470,661, 1995
Modeling and characterization of quantization, polysilicon depletion, and direct tunneling effects in MOSFETs with ultrathin oxides
SH Lo, DA Buchanan, Y Taur
IBM Journal of Research and Development 43 (3), 327-337, 1999
Self‐consistent modeling of accumulation layers and tunneling currents through very thin oxides
F Rana, S Tiwari, DA Buchanan
Applied physics letters 69 (8), 1104-1106, 1996
Anode hole injection and trapping in silicon dioxide
DJ DiMaria, E Cartier, DA Buchanan
Journal of applied physics 80 (1), 304-317, 1996
CMOS scaling into the 21st century: 0.1 µm and beyond
Y Taur, YJ Mii, DJ Frank, HS Wong, DA Buchanan, SJ Wind, SA Rishton, ...
IBM Journal of Research and Development 39 (1.2), 245-260, 1995
Interface and bulk trap generation in metal‐oxide‐semiconductor capacitors
DA Buchanan, DJ DiMaria
Journal of applied physics 67 (12), 7439-7452, 1990
Unpinned gallium oxide/GaAs interface by hydrogen and nitrogen surface plasma treatment
A Callegari, PD Hoh, DA Buchanan, D Lacey
Applied physics letters 54 (4), 332-334, 1989
Interfacial oxidation process for high-k gate dielectric process integration
AW Ballantine, DA Buchanan, EA Cartier, KK Chan, MW Copel, ...
US Patent 6,444,592, 2002
80 nm polysilicon gated n-FETs with ultra-thin Al2O3 gate dielectric for ULSI applications
DA Buchanan, EP Gusev, E Cartier, H Okorn-Schmidt, K Rim, ...
Electron Devices Meeting, 2000. IEDM'00. Technical Digest. International …, 2000
Interface states induced by the presence of trapped holes near the silicon–silicon‐dioxide interface
DJ DiMaria, DA Buchanan, JH Stathis, RE Stahlbush
Journal of applied physics 77 (5), 2032-2040, 1995
Hot‐electron‐induced hydrogen redistribution and defect generation in metal‐oxide‐semiconductor capacitors
DA Buchanan, AD Marwick, DJ DiMaria, L Dori
Journal of applied physics 76 (6), 3595-3608, 1994
Reliability and integration of ultra-thin gate dielectrics for advanced CMOS
DA Buchanan, SH Lo
Microelectronic engineering 36 (1-4), 13-20, 1997
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