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José F. Martínez
José F. Martínez
Lee Teng-hui Professor of Engineering at Cornell University
Bestätigte E-Mail-Adresse bei cornell.edu - Startseite
Titel
Zitiert von
Zitiert von
Jahr
Self-optimizing memory controllers: A reinforcement learning approach
E Ipek, O Mutlu, JF Martínez, R Caruana
Intl. Symp. on Computer Architecture (ISCA), 2008
6522008
Core Fusion: Accommodating software diversity in chip multiprocessors
E Ipek, M Kirman, N Kirman, JF Martínez
Intl. Symp. on Computer Architecture (ISCA), 2007
4062007
Leveraging optical technology in future bus-based chip multiprocessors
N Kirman, M Kirman, RK Dokania, JF Martínez, AB Apsel, MA Watkins, ...
Intl. Symp. on Microarchitecture (MICRO), 2006
4042006
Dynamic power-performance adaptation of parallel computation on chip multiprocessors
J Li, JF Martínez
Intl. Symp. on High Performance Computer Architecture (HPCA), 2006
3722006
Coordinated management of multiple interacting resources in chip multiprocessors: A machine learning approach
R Bitirgen, E Ipek, JF Martínez
Intl. Symp. on Microarchitecture (MICRO), 2008
3712008
PARTIES: QoS-aware resource partitioning for multiple interactive services
S Chen, C Delimitrou, JF Martínez
Intl. Conf. on Architectural Support for Programming Languages and Operating …, 2019
3402019
Cherry: Checkpointed early resource recycling in out-of-order microprocessors
JF Martínez, J Renau, MC Huang, M Prvulovic, J Torrellas
Intl. Symp. on Microarchitecture (MICRO), 2002
3062002
Architectural support for scalable speculative parallelization in shared-memory multiprocessors
M Cintra, JF Martínez, J Torrellas
Intl. Symp. on Computer Architecture (ISCA), 2000
2892000
Speculative synchronization: Applying thread-level speculation to explicitly parallel applications
JF Martínez, J Torrellas
Intl. Conf. on Architectural Support for Programming Languages and Operating …, 2002
2802002
The thrifty barrier: Energy-aware synchronization in shared-memory multiprocessors
J Li, JF Martínez, MC Huang
Intl. Symp. on High Performance Computer Architecture (HPCA), 2004
1982004
Utilizing dynamically coupled cores to form a resilient chip multiprocessor
C LaFrieda, E Ipek, JF Martínez, R Manohar
Intl. Conf. on Dependable Systems and Networks (DSN), 2007
1912007
GraphGen: An FPGA framework for vertex-centric graph computation
E Nurvitadhi, G Weisz, Y Wang, S Hurkat, M Nguyen, JC Hoe, JF Martínez, ...
Intl. Symp. on Field-Programmable Custom Computing Machines (FCCM), 2014
1652014
Understanding and mitigating refresh overheads in high-density DDR4 DRAM systems
J Mukundan, H Hunter, K Kim, J Stuecheli, JF Martínez
Intl. Symp. on Computer Architecture (ISCA), 2013
1372013
A power-efficient all-optical on-chip interconnect using wavelength-based oblivious routing
N Kirman, JF Martínez
Intl. Conf. on Architectural Support for Programming Languages and Operating …, 2010
1312010
Checkpointed early load retirement
N Kirman, M Kirman, M Chaudhuri, JF Martínez
Intl. Symp. on High Performance Computer Architecture (HPCA), 2005
1252005
Dynamic multicore resource management: A machine learning approach
JF Martínez, E Ipek
IEEE Micro 29 (5), 8-17, 2009
1122009
Power-performance considerations of parallel computing on chip multiprocessors
J Li, JF Martínez
ACM Trans. on Architecture and Code Optimization (TACO) 2 (4), 397-422, 2005
1112005
Toward kilo-instruction processors
A Cristal, OJ Santana, M Valero, JF Martínez
ACM Trans. on Architecture and Code Optimization (TACO) 1 (4), 389-417, 2004
1112004
Improving memory scheduling via processor-side load criticality information
S Ghose, H Lee, JF Martínez
Intl. Symp. on Computer Architecture (ISCA), 2013
1052013
Power-performance implications of thread-level parallelism on chip multiprocessors
J Li, JF Martínez
Intl. Symp. on Performance Analysis of Systems and Software (ISPASS), 2005
952005
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